Development Of Packaging Technology

The earliest integrated circuits used ceramic flat packaging, which has been used by the military for many years because of its reliability and small size. Commercial circuit packaging soon changed to dual in-line packaging, starting with ceramics and then plastics. In the 1980s, the pins of VLSI circuits exceeded the application limits of dip packaging, and finally led to the emergence of pin grid arrays and chip carriers.

Surface mount packaging appeared in the early 1980s and became popular in the late 1980s. It uses thinner foot spacing, and the pin shape is seagull wing or J-type. Taking small outline integrated circuit (SOIC) as an example, it is 30-50% less in area and 70% less in thickness than the equivalent dip. This package has seagull wing shaped pins protruding on two long sides, and the pin spacing is 0.05 inches.

Small outline integrated circuit (SOIC) and PLCC package. In the 1990s, although PGA packages were still often used in high-end microprocessors. PQFP and thin small outline package (TSOP) have become common packages for high pin count devices. Intel and AMD's high-end microprocessors have moved from PGA (pine grid array) packaging to land grid array (LGA) packaging.

Ball grid array packages began to appear in the 1970s. In the 1990s, flip chip ball grid array packages with more pins than other packages were developed. In the FCBGA package, the die is flipped up and down, and connected to the solder balls on the package through a base layer similar to the PCB instead of wires. The FCBGA package enables the input / output signal array (called I / O area) to be distributed on the surface of the chip, rather than restricted to the periphery of the chip. In today's market, packaging is also an independent part, and packaging technology will also affect the quality and yield of products.